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Multiprocessor Architectures (2016 Autumn)

Organisation: UTU / Dept. of Information Technology

Credit Points: 5

Responsible Person: Juha Plosila

Course code: ETT_2062

Objectives:
To develop understanding of architectures, operation principles, interconnection network technologies, and memory management of both shared memory and distributed-memory systems. Understanding of GPU based massively parallel systems. Knowledge of industrial real-life multiprocessor applications. Ability to model and simulate multiprocessor systems using state-of-the-art tools. Understanding of architectures of computer servers and data centers.

Content:
Classification of parallel architectures and multiprocessors: function-parallel and data-parallel systems. Processor interconnection networks: components, topologies, switching methods (flow control), and routing protocols. Task allocation and data transfer management. Message passing and shared memory based parallel programming principles. Cache coherence management and memory consistency. Multiprocessor synchronization principles. Industrial example systems.

6.9.–26.10.2016

Lectures:

  1. Tue 6.9.–25.10. weekly at 10–12, K127, Agora
  2. Wed 7.9.–26.10. weekly at 10–12, K127, Agora